/***************************************************************************//**
* \file cyreg_evtgen.h
*
* \brief
* EVTGEN register definition header
*
* \note
* Generator version: 1.6.0.217
* Database revision: TVIIBE4M_WW2014_BTO
*
********************************************************************************
* \copyright
* Copyright 2016-2020, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/

#ifndef _CYREG_EVTGEN_H_
#define _CYREG_EVTGEN_H_

#include "cyip_evtgen.h"

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT0)
  */
#define CYREG_EVTGEN0_COMP_STRUCT0_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F0800UL)
#define CYREG_EVTGEN0_COMP_STRUCT0_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F0804UL)
#define CYREG_EVTGEN0_COMP_STRUCT0_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F0808UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT1)
  */
#define CYREG_EVTGEN0_COMP_STRUCT1_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F0820UL)
#define CYREG_EVTGEN0_COMP_STRUCT1_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F0824UL)
#define CYREG_EVTGEN0_COMP_STRUCT1_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F0828UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT2)
  */
#define CYREG_EVTGEN0_COMP_STRUCT2_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F0840UL)
#define CYREG_EVTGEN0_COMP_STRUCT2_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F0844UL)
#define CYREG_EVTGEN0_COMP_STRUCT2_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F0848UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT3)
  */
#define CYREG_EVTGEN0_COMP_STRUCT3_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F0860UL)
#define CYREG_EVTGEN0_COMP_STRUCT3_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F0864UL)
#define CYREG_EVTGEN0_COMP_STRUCT3_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F0868UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT4)
  */
#define CYREG_EVTGEN0_COMP_STRUCT4_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F0880UL)
#define CYREG_EVTGEN0_COMP_STRUCT4_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F0884UL)
#define CYREG_EVTGEN0_COMP_STRUCT4_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F0888UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT5)
  */
#define CYREG_EVTGEN0_COMP_STRUCT5_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F08A0UL)
#define CYREG_EVTGEN0_COMP_STRUCT5_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F08A4UL)
#define CYREG_EVTGEN0_COMP_STRUCT5_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F08A8UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT6)
  */
#define CYREG_EVTGEN0_COMP_STRUCT6_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F08C0UL)
#define CYREG_EVTGEN0_COMP_STRUCT6_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F08C4UL)
#define CYREG_EVTGEN0_COMP_STRUCT6_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F08C8UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT7)
  */
#define CYREG_EVTGEN0_COMP_STRUCT7_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F08E0UL)
#define CYREG_EVTGEN0_COMP_STRUCT7_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F08E4UL)
#define CYREG_EVTGEN0_COMP_STRUCT7_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F08E8UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT8)
  */
#define CYREG_EVTGEN0_COMP_STRUCT8_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F0900UL)
#define CYREG_EVTGEN0_COMP_STRUCT8_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F0904UL)
#define CYREG_EVTGEN0_COMP_STRUCT8_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F0908UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT9)
  */
#define CYREG_EVTGEN0_COMP_STRUCT9_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F0920UL)
#define CYREG_EVTGEN0_COMP_STRUCT9_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F0924UL)
#define CYREG_EVTGEN0_COMP_STRUCT9_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F0928UL)

/**
  * \brief Comparator structure (EVTGEN_COMP_STRUCT10)
  */
#define CYREG_EVTGEN0_COMP_STRUCT10_COMP_CTL ((volatile un_EVTGEN_COMP_STRUCT_COMP_CTL_t*) 0x403F0940UL)
#define CYREG_EVTGEN0_COMP_STRUCT10_COMP0 ((volatile un_EVTGEN_COMP_STRUCT_COMP0_t*) 0x403F0944UL)
#define CYREG_EVTGEN0_COMP_STRUCT10_COMP1 ((volatile un_EVTGEN_COMP_STRUCT_COMP1_t*) 0x403F0948UL)

/**
  * \brief Event generator (EVTGEN0)
  */
#define CYREG_EVTGEN0_CTL               ((volatile un_EVTGEN_CTL_t*) 0x403F0000UL)
#define CYREG_EVTGEN0_COMP0_STATUS      ((volatile un_EVTGEN_COMP0_STATUS_t*) 0x403F0004UL)
#define CYREG_EVTGEN0_COMP1_STATUS      ((volatile un_EVTGEN_COMP1_STATUS_t*) 0x403F0008UL)
#define CYREG_EVTGEN0_COUNTER_STATUS    ((volatile un_EVTGEN_COUNTER_STATUS_t*) 0x403F0010UL)
#define CYREG_EVTGEN0_COUNTER           ((volatile un_EVTGEN_COUNTER_t*) 0x403F0014UL)
#define CYREG_EVTGEN0_RATIO_CTL         ((volatile un_EVTGEN_RATIO_CTL_t*) 0x403F0020UL)
#define CYREG_EVTGEN0_RATIO             ((volatile un_EVTGEN_RATIO_t*) 0x403F0024UL)
#define CYREG_EVTGEN0_REF_CLOCK_CTL     ((volatile un_EVTGEN_REF_CLOCK_CTL_t*) 0x403F0030UL)
#define CYREG_EVTGEN0_INTR              ((volatile un_EVTGEN_INTR_t*) 0x403F0700UL)
#define CYREG_EVTGEN0_INTR_SET          ((volatile un_EVTGEN_INTR_SET_t*) 0x403F0704UL)
#define CYREG_EVTGEN0_INTR_MASK         ((volatile un_EVTGEN_INTR_MASK_t*) 0x403F0708UL)
#define CYREG_EVTGEN0_INTR_MASKED       ((volatile un_EVTGEN_INTR_MASKED_t*) 0x403F070CUL)
#define CYREG_EVTGEN0_INTR_DPSLP        ((volatile un_EVTGEN_INTR_DPSLP_t*) 0x403F0710UL)
#define CYREG_EVTGEN0_INTR_DPSLP_SET    ((volatile un_EVTGEN_INTR_DPSLP_SET_t*) 0x403F0714UL)
#define CYREG_EVTGEN0_INTR_DPSLP_MASK   ((volatile un_EVTGEN_INTR_DPSLP_MASK_t*) 0x403F0718UL)
#define CYREG_EVTGEN0_INTR_DPSLP_MASKED ((volatile un_EVTGEN_INTR_DPSLP_MASKED_t*) 0x403F071CUL)

#endif /* _CYREG_EVTGEN_H_ */


/* [] END OF FILE */
